Chip History

A test chip developed by the ECE 5745 class to explore Caravel and OpenLane. Hardware includes:

• A RISCV Litex SOC
• 4 hardware accelerators:
  • Group 15: Wavelet Compression Accelerator
  • Group 16: SpMV Accelerator
  • Group 17: BNN Accelerator
  • Group 99: GCD Accelerator

C2S2's Analog Tapeout for the year. Hardware includes:

• A RISCV Litex SOC
• Operational Amplifiers
  • A "fingers" implementation
  • A "multiplier" implementation

C2S2's Digital Tapeout for the year. Hardware includes:

• A RISCV Litex SOC
• A custom digital FFT